module nzp(
input signed [15:0] D_IN,
input LD,
output reg [2:0] NZP);

always@(LD,D_IN)
begin
	if(LD==1'b1) begin
		if(D_IN==0) NZP=3'b010;
		else if(D_IN<0) NZP=3'b100;
		else  NZP=3'b001;
	end
end
endmodule